Space-borne Synthetic Aperture Radar (SAR) like RISAT-1/1A (Radar Imaging Satellite) utilise active phased array radar because of the latter’s capability of electronics beam steering, multi-beam operations, large bandwidth and high efficiency. Electronic beam steering requires real time loading of digital amplitude and phase values to the array of Transmit/Receive Modules (TRM). T/R Controllers (TRC) are used to load these beam characterization data, timing control and serial communication. Micro-controller based ASIC (Application Specific Integrated Circuit) is the crucial component of TRC.
ASICs are fabricated at semiconductor foundry having required process technology. The onboard Controller (OBC-1.0) ASIC used in RISAT-1 was based on 0.6 microns CMOS process. The OBC-1.0 ASIC front-end was designed by SAC. The OBC-1.0 is a digital ASIC based on 8 bit microcontroller with various peripheral modules. Chip was fabricated in a foreign foundry due to the lack of indigenous semiconductor foundry during the timeframe of development of RISAT-1.
During the development of SAR payload for RISAT-1A, a 0.18 micron CMOS foundry was operationalized at Semiconductor Laboratory (SCL), Chandigarh. Hence, OBC-2.3 ASIC front-end design OBC-2.3 ASIC was taken up by SAC with SCL process. OBC-2.3 ASIC is a mixed signal ASIC with 8 bit microcontroller core and various digital and analog peripheral modules. OBC-2.3 ASIC is designed for T/R Controller (TRC) of SAR payload of RISAT-1A/1B and similar future microwave remote sensing missions.
Figure-1 : OBC-2.3 ASIC die and package photographs